| Dual-polarized slot antenna for full-duplex systems with high isolation AN Nguyen, VH Le, N Nguyen-Trong, M Radfar, A Ebrahimi, K Phan, ... IEEE Transactions on Antennas and Propagation 69 (11), 7119-7124, 2020 | 30 | 2020 |
| Battery management technique to reduce standby energy consumption in ultra-low power IoT and sensory applications M Radfar, A Nakhlestani, H Le Viet, A Desai IEEE Transactions on Circuits and Systems I: Regular Papers 67 (1), 336-345, 2019 | 24 | 2019 |
| Recent subthreshold design techniques M Radfar, K Shah, J Singh Active and Passive Electronic Components 2012, 2012 | 21 | 2012 |
| Low-power area-efficient LDO with loop-gain and bandwidth enhancement using non-dominant pole movement technique for IoT applications A Nakhlestani, SV Kaveri, M Radfar, A Desai IEEE Transactions on Circuits and Systems II: Express Briefs 68 (2), 692-696, 2020 | 17 | 2020 |
| A highly sensitive and ultra low‐power forward body biasing circuit to overcome severe process, voltage and temperature variations and extreme voltage scaling M Radfar, K Shah, J Singh International Journal of Circuit Theory and Applications 43 (2), 233-252, 2015 | 13 | 2015 |
| Wideband compact triangle-slot antenna with out-of-band rejection NA Nguyen, M Radfar, A Ebrahimi, VD Ngo, A Bervan, VH Le, A Desai IEEE Antennas and Wireless Propagation Letters 19 (6), 921-925, 2020 | 12 | 2020 |
| A yield improvement technique in severe process, voltage, and temperature variations and extreme voltage scaling M Radfar, J Singh Microelectronics Reliability 54 (12), 2813-2823, 2014 | 12 | 2014 |
| Analysis of geometric and non-linear programming as optimization algorithms for low power vlsi circuits M Radfar, SP Mozafari, K Shah, J Singh 2011 24th Canadian Conference on Electrical and Computer Engineering (CCECE …, 2011 | 2 | 2011 |
| A reliability improvement technique in severe process variations and ultra low voltages. M Radfar, K Shah, J Singh Biomedical Circuits and Systems Conference (BioCAS), 210-213, 2013 | 1 | 2013 |
| Faster solution of nonlinear equations using logical effort method and curve fitting in low power design M Radfar, S Pourmozaffari IEICE Electronics Express 6 (13), 889-896, 2009 | 1 | 2009 |
| Stochastic Quantization Using Magnetic Tunnel Junction Devices: A Simulation Study M Radfar, K Yogendra, K Roy IEEE Transactions on Magnetics 53 (3), 1-6, 2016 | | 2016 |
| Method to address CMOS design performance decline due to PVT variation M Radfar LAP LAMBERT Academic Publishing, 2016 | | 2016 |
| Method to address performance decline due to process, voltage, and temperature variations in integrated circuits M Radfar La Trobe, 2013 | | 2013 |
Kriyang ShahInfineon Technologies, Texas Instruments, Redpine Signals Inc., La Trobe UniversityVerified email at infineon.com
