| A comparative analysis of copper and carbon nanotubes-based global interconnects in 32 nm technology A Joshi, G Soni Proceedings of Fifth International Conference on Soft Computing for Problem …, 2016 | 13 | 2016 |
| Comparision analysis of FinFET based 1-bit full adder cell implemented using different logic styles at 10, 22 and 32NM S Sharma, G Soni 2016 International Conference on Energy Efficient Technologies for …, 2016 | 11 | 2016 |
| Power analysis of Si MOSFET and CNFET based logic gates R Sethi, G Soni Int. J. Eng. Manag. Sci.(Alied Journals-IJEMS) 2 (5), 2015 | 4 | 2015 |
| Power, energy and SNM optimization of 6TSRAM cell using power gating technique SS Kumar, G Soni 2015 fifth international conference on communication systems and network …, 2015 | 4 | 2015 |
| A Novel Power Efficient Pulse Triggered Flip Flop with Minimum Transistors G Soni 2016 Second International Conference on Computational Intelligence …, 2016 | 1 | 2016 |
| Comparative Analysis of Si-MOSFET and CNFET-Based 28T Full Adder R Sethi, G Soni Proceedings of Fifth International Conference on Soft Computing for Problem …, 2016 | 1 | 2016 |
| Crosstalk analysis in global interconnects P Kumawat, G Soni Int. Bull. Math. Res.(Alied Journals-IBMR) 2 (1), 257-263, 2015 | 1 | 2015 |
| Power and Delay Optimization of 1 Bit Full Adder using MTCMOS Technique S Gour, G Soni, SS Kumar International Journal of Advancements in Power Electronics & Digital Devices …, 2014 | 1 | 2014 |
| Crosstalk Noise Voltage Analysis in Global Interconnects P Kumawat, G Soni Proceedings of Fifth International Conference on Soft Computing for Problem …, 2016 | | 2016 |
| An Analysis of Power and Stability of 6T SRAM Using Power Gating Technique SS Kumar, S Gour, G Soni IUP Journal of Electrical and Electronics Engineering 8 (2), 35, 2015 | | 2015 |
