Ioannis Savidis

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Citations	1657	759
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i10-index	23	18

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Eby G. FriedmanDistinguished Professor, University of RochesterVerified email at ece.rochester.edu
Kyle JuretusAssistant Professor, Villanova UniversityVerified email at villanova.edu
Divy PathakDepartment of Electrical and Computer Engineering, Drexel UniversityVerified email at drexel.edu
Vasilis F. PavlidisComputer Science and University of ManchesterVerified email at cs.man.ac.uk
Houman HomayounUniversity of California DavisVerified email at ucdavis.edu
Vaibhav Venugopal RaoPhD Candidate at Drexel UniversityVerified email at drexel.edu
M. S. HossainDrexel UniversityVerified email at drexel.edu
Michael HuangUniversity of RochesterVerified email at rochester.edu
Alok GargAMD, University of RochesterVerified email at amd.com
Mohammad Khavari TavanaNortheastern UniversityVerified email at husky.neu.edu
Nagarajan KandasamyProfessor of computer engineering, Drexel UniversityVerified email at drexel.edu
Kapil R. DandekarE. Warren Colehower Chair Professor, Electrical and Computer Engineering, Drexel UniversityVerified email at drexel.edu
Marko JacovicPhD in Electrical Engineering from Drexel UniversityVerified email at drexel.edu
Selçuk KöseUniversity of RochesterVerified email at ur.rochester.edu
Ankur JainAssociate Professor of Mechanical Engineering, University of Texas, ArlingtonVerified email at uta.edu
Syed M. AlamEverspin Technologies, Inc.Verified email at alum.mit.edu
James ChackoResearch Assistant, Drexel UniversityVerified email at drexel.edu
Cem SahinResearch Associate II, Drexel UniversityVerified email at drexel.edu
Boris VaisbandMcGill UniversityVerified email at mcgill.ca
Baris TaskinProfessor of ECE, Drexel UniversityVerified email at coe.drexel.edu

Ioannis Savidis

Associate Professor, Drexel University

Verified email at coe.drexel.edu - Homepage

VLSI 3-D Integration hardware security and trust low power circuits ML/AI CAD


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
Three-dimensional integrated circuit design VF Pavlidis, I Savidis, EG Friedman Newnes, 2017	417	2017
Closed-form expressions of 3-D via resistance, inductance, and capacitance I Savidis, EG Friedman IEEE Transactions on Electron Devices 56 (9), 1873-1881, 2009	230	2009
An intra-chip free-space optical interconnect J Xue, A Garg, B Ciftcioglu, J Hu, S Wang, I Savidis, M Jain, R Berman, ... ACM SIGARCH Computer Architecture News 38 (3), 94-105, 2010	101	2010
Electrical modeling and characterization of through-silicon vias (TSVs) for 3-D integrated circuits I Savidis, SM Alam, A Jain, S Pozder, RE Jones, R Chatterjee Microelectronics Journal 41 (1), 9-16, 2010	88	2010
Clock distribution networks for 3-D ictegrated Circuits VF Pavlidis, I Savidis, EG Friedman 2008 IEEE Custom Integrated Circuits Conference, 651-654, 2008	78	2008
Electrical modeling and characterization of 3-D vias I Savidis, EG Friedman 2008 IEEE International Symposium on Circuits and Systems, 784-787, 2008	73	2008
Clock distribution networks in 3-D integrated systems VF Pavlidis, I Savidis, EG Friedman IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (12 …, 2010	57	2010
3-D integrated heterogeneous intra-chip free-space optical interconnect B Ciftcioglu, R Berman, S Wang, J Hu, I Savidis, M Jain, D Moore, ... Optics express 20 (4), 4331-4345, 2012	54	2012
A 3-D integrated intrachip free-space optical interconnect for many-core chips B Ciftcioglu, R Berman, J Zhang, Z Darling, S Wang, J Hu, J Xue, A Garg, ... IEEE Photonics Technology Letters 23 (3), 164-166, 2010	37	2010
Protecting analog circuits with parameter biasing obfuscation VV Rao, I Savidis 2017 18th IEEE Latin American Test Symposium (LATS), 1-6, 2017	34	2017
Reduced overhead gate level logic encryption K Juretus, I Savidis 2016 International Great Lakes Symposium on VLSI (GLSVLSI), 15-20, 2016	33	2016
Thermal analysis of oxide-confined VCSEL arrays J Wang, I Savidis, EG Friedman Microelectronics journal 42 (5), 820-825, 2011	29	2011
ElasticCore: enabling dynamic heterogeneity with joint core and voltage/frequency scaling MK Tavana, MH Hajkazemi, D Pathak, I Savidis, H Homayoun Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015	27	2015
Power conversion efficiency-aware mapping of multithreaded applications on heterogeneous architectures: A comprehensive parameter tuning H Sayadi, D Pathak, I Savidis, H Homayoun 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 70-75, 2018	25	2018
Reducing logic encryption overhead through gate level key insertion K Juretus, I Savidis 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 1714-1717, 2016	25	2016
Power noise in TSV-based 3-D integrated circuits I Savidis, S Kose, EG Friedman IEEE Journal of Solid-State Circuits 48 (2), 587-597, 2012	24	2012
Thermal conduction path analysis in 3-d ics B Vaisband, I Savidis, EG Friedman 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 594-597, 2014	19	2014
Smart grid on chip: Work load-balanced on-chip power delivery D Pathak, H Homayoun, I Savidis IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (9 …, 2017	16	2017
Securing analog mixed-signal integrated circuits through shared dependencies K Juretus, V Venugopal Rao, I Savidis Proceedings of the 2019 on Great Lakes Symposium on VLSI, 483-488, 2019	14	2019
Mesh based obfuscation of analog circuit properties VV Rao, I Savidis 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019	13	2019

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