| Automatically characterizing large scale program behavior T Sherwood, E Perelman, G Hamerly, B Calder ACM SIGPLAN Notices 37 (10), 45-57, 2002 | 2260 | 2002 |
| Basic block distribution analysis to find periodic behavior and simulation points in applications T Sherwood, E Perelman, B Calder Proceedings 2001 International Conference on Parallel Architectures and …, 2001 | 767 | 2001 |
| Phase tracking and prediction T Sherwood, S Sair, B Calder ACM SIGARCH Computer Architecture News 31 (2), 336-349, 2003 | 673 | 2003 |
| Deterministic memory-efficient string matching algorithms for intrusion detection N Tuck, T Sherwood, B Calder, G Varghese IEEE INFOCOM 2004 4, 2628-2639, 2004 | 624 | 2004 |
| Active pages: A computation model for intelligent memory M Oskin, FT Chong, T Sherwood Proceedings of the 25th annual international symposium on Computer …, 1998 | 475 | 1998 |
| Using simpoint for accurate and efficient simulation E Perelman, G Hamerly, M Van Biesbrouck, T Sherwood, B Calder ACM SIGMETRICS Performance Evaluation Review 31 (1), 318-319, 2003 | 453 | 2003 |
| A high throughput string matching architecture for intrusion detection and prevention L Tan, T Sherwood 32nd International Symposium on Computer Architecture (ISCA'05), 112-122, 2005 | 444 | 2005 |
| Discovering and exploiting program phases T Sherwood, E Perelman, G Hamerly, S Sair, B Calder IEEE micro 23 (6), 84-93, 2003 | 376 | 2003 |
| Complete information flow tracking from the gates up M Tiwari, HMG Wassel, B Mazloom, S Mysore, FT Chong, T Sherwood Proceedings of the 14th international conference on Architectural support …, 2009 | 320 | 2009 |
| A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy GL Loi, B Agrawal, N Srivastava, SC Lin, T Sherwood, K Banerjee Proceedings of the 43rd annual Design Automation Conference, 991-996, 2006 | 264 | 2006 |
| Time varying behavior of programs T Sherwood, B Calder In UC San Diego, 1999 | 188 | 1999 |
| Predictor-directed stream buffers T Sherwood, S Sair, B Calder Proceedings of the 33rd annual ACM/IEEE international symposium on …, 2000 | 171 | 2000 |
| SurfNoC: A low latency and provably non-interfering approach to secure networks-on-chip HMG Wassel, Y Gao, JK Oberg, T Huffmire, R Kastner, FT Chong, ... ACM SIGARCH Computer Architecture News 41 (3), 583-594, 2013 | 167 | 2013 |
| Sapper: A language for hardware-level security policy enforcement X Li, V Kashyap, JK Oberg, M Tiwari, VR Rajarathinam, R Kastner, ... Proceedings of the 19th international conference on Architectural support …, 2014 | 161 | 2014 |
| Caisson: a hardware description language for secure information flow X Li, M Tiwari, JK Oberg, V Kashyap, FT Chong, T Sherwood, ... ACM Sigplan Notices 46 (6), 109-120, 2011 | 158 | 2011 |
| Moats and drawbridges: An isolation primitive for reconfigurable hardware based systems T Huffmire, B Brotherton, G Wang, T Sherwood, R Kastner, T Levin, ... 2007 IEEE Symposium on Security and Privacy (SP'07), 281-295, 2007 | 154 | 2007 |
| Modeling TCAM power for next generation network devices B Agrawal, T Sherwood 2006 IEEE International Symposium on Performance Analysis of Systems and …, 2006 | 153 | 2006 |
| Reducing cache misses using hardware and software page placement T Sherwood, B Calder, J Emer Proceedings of the 13th international conference on Supercomputing, 155-164, 1999 | 150 | 1999 |
| Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security M Tiwari, JK Oberg, X Li, J Valamehr, T Levin, B Hardekopf, R Kastner, ... ACM SIGARCH Computer Architecture News 39 (3), 189-200, 2011 | 147 | 2011 |
| Bitwidth cognizant architecture synthesis of custom hardware accelerators S Mahlke, R Ravindran, M Schlansker, R Schreiber, T Sherwood IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001 | 141 | 2001 |
