| EPIC: An energy-efficient, high-performance GPGPU computing research infrastructure M Själander, M Jahre, G Tufte, N Reissmann arXiv preprint arXiv:1912.05848, 2019 | 214 | 2019 |
| BISMO: A scalable bit-serial matrix multiplication overlay for reconfigurable computing Y Umuroglu, L Rasnayake, M Själander 2018 28th International Conference on Field Programmable Logic and …, 2018 | 133 | 2018 |
| Efficient invisible speculative execution through selective delay and value prediction C Sakalis, S Kaxiras, A Ros, A Jimborean, M Själander Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 132 | 2019 |
| Twig: Multi-agent task management for colocated latency-critical cloud services R Nishtala, V Petrucci, P Carpenter, M Sjalander 2020 IEEE International Symposium on High Performance Computer Architecture …, 2020 | 96 | 2020 |
| A high-speed, energy-efficient two-cycle multiply-accumulate (MAC) architecture and its application to a double-throughput MAC unit TT Hoang, M Sjalander, P Larsson-Edefors Circuits and Systems I: Regular Papers, IEEE Transactions on 57 (12), 3073-3081, 2010 | 83 | 2010 |
| Multiplication acceleration through twin precision M Sjalander, P Larsson-Edefors IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (9 …, 2009 | 70 | 2009 |
| FlexCore: Utilizing exposed datapath control for efficient computing M Thuresson, M Själander, M Björk, L Svensson, P Larsson-Edefors, ... Journal of Signal Processing Systems 57, 5-19, 2009 | 67 | 2009 |
| High-speed and low-power multipliers using the Baugh-Wooley algorithm and HPM reduction tree M Sjalander, P Larsson-Edefors 2008 15th IEEE international conference on electronics, circuits and systems …, 2008 | 64 | 2008 |
| A look-ahead task management unit for embedded multi-core architectures M Själander, A Terechko, M Duranton Digital System Design Architectures, Methods and Tools, 2008. DSD'08. 11th …, 2008 | 62* | 2008 |
| An LTE Uplink Receiver PHY Benchmark and Subframe-Based Power Management M Själander, SA McKee, P Brauer, D Engdal, A Vajda IEEE International Symposium on Performance Analysis of Systems and Software …, 2012 | 50 | 2012 |
| Next Generation Multi-Purpose Microprocessor J Andersson, M Själander, J Gaisler Data Systems In Aerospace (DASIA 2010), 2010 | 49 | 2010 |
| Power-efficient computer architectures: Recent advances M Själander, M Martonosi, S Kaxiras Morgan & Claypool Publishers, 2014 | 47 | 2014 |
| Multiplier reduction tree with logarithmic logic depth and regular connectivity H Eriksson, P Larsson-Edefors, M Sheeran, M Sjalander, D Johansson, ... 2006 IEEE International Symposium on Circuits and Systems, 4 pp.-8, 2006 | 47 | 2006 |
| The Case for HPM-Based Baugh-Wooley Multipliers M Själander, P Larson-Edefors Chalmers University of Technology, Sweden, 2008 | 46 | 2008 |
| An efficient twin-precision multiplier M Sjalander, H Eriksson, P Larsson-Edefors IEEE International Conference on Computer Design: VLSI in Computers and …, 2004 | 44 | 2004 |
| A low-leakage twin-precision multiplier using reconfigurable power gating M Sjalander, M Drazdziulis, P Larsson-Edefors, H Eriksson 2005 IEEE International Symposium on Circuits and Systems (ISCAS), 1654-1657, 2005 | 40 | 2005 |
| Ghost loads: What is the cost of invisible speculation? C Sakalis, M Alipour, A Ros, A Jimborean, S Kaxiras, M Själander Proceedings of the 16th ACM International Conference on Computing Frontiers …, 2019 | 35 | 2019 |
| Clairvoyance: Look-ahead compile-time scheduling KA Tran, TE Carlson, K Koukos, M Själander, V Spiliopoulos, S Kaxiras, ... 2017 IEEE/ACM International Symposium on Code Generation and Optimization …, 2017 | 35 | 2017 |
| Optimizing bit-serial matrix multiplication for reconfigurable computing Y Umuroglu, D Conficconi, L Rasnayake, TB Preusser, M Själander ACM Transactions on Reconfigurable Technology and Systems (TRETS) 12 (3), 1-24, 2019 | 26 | 2019 |
| Techniques to measure, model, and manage power B Goel, SA McKee, M Själander Advances in Computers 87, 7-54, 2012 | 26 | 2012 |
Per Larsson-EdeforsProfessor, Chalmers University of TechnologyVerified email at chalmers.se
