| Content-addressable memory (CAM) circuits and architectures: A tutorial and survey K Pagiamtzis, A Sheikholeslami Solid-State Circuits, IEEE Journal of 41 (3), 712-727, 2006 | 1606 | 2006 |
| A low-power content-addressable memory (CAM) using pipelined hierarchical search scheme K Pagiamtzis, A Sheikholeslami Solid-State Circuits, IEEE Journal of 39 (9), 1512-1519, 2004 | 254 | 2004 |
| A soft-error tolerant content-addressable memory (CAM) using an error-correcting-match scheme K Pagiamtzis, N Azizi, FN Najm IEEE Custom Integrated Circuits Conference 2006, 301-304, 2006 | 87 | 2006 |
| Pipelined match-lines and hierarchical search-lines for low-power content-addressable memories K Pagiamtzis, A Sheikholeslami Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003 …, 2003 | 87 | 2003 |
| Memory error detection circuitry K Pagiamtzis, D Lewis US Patent 8,560,927, 2013 | 27 | 2013 |
| Using cache to reduce power in content-addressable memories (CAMs) K Pagiamtzis, A Sheikholeslami Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005 …, 2005 | 27 | 2005 |
| A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices H Kimura, K Pagiamtzis, A Sheikholeslami, T Hanyu Proceedings of the International Symposium on Multiple-Valued Logic, 340-345, 2004 | 14 | 2004 |
| Empirical performance prediction for IFFT/FFT cores for OFDM systems-on-a-chip K Pagiamtzis, PG Gulak The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002 …, 2002 | 10 | 2002 |
Ali SheikholeslamiProfessor of Electrical and Computer Engineering, University of TorontoVerified email at eecg.utoronto.ca
