A single-electron injection device for CMOS charge qubits implemented in 22-nm FD-SOI I Bashir, E Blokhina, A Esmailiyan, D Leipold, M Asker, E Koskin, ... IEEE Solid-State Circuits Letters 3, 206-209, 2020 | 35 | 2020 |
A fully integrated DAC for CMOS position-based charge qubits with single-electron detector loopback testing A Esmailiyan, H Wang, M Asker, E Koskin, D Leipold, I Bashir, K Xu, ... IEEE Solid-State Circuits Letters 3, 354-357, 2020 | 19 | 2020 |
A concept of synchronous ADPLL networks in application to small-scale antenna arrays E Koskin, D Galayko, E Blokhina IEEE Access 6, 18723-18730, 2018 | 13 | 2018 |
Discrete-time modelling and experimental validation of an all-digital PLL for clock-generating networks E Koskin, E Blokhina, C Shan, E Zianbetov, O Feely, D Galayko 2016 14th IEEE International New Circuits and Systems Conference (NEWCAS), 1-4, 2016 | 13 | 2016 |
Generation of a clocking signal in synchronized all-digital PLL networks E Koskin, D Galayko, O Feely, E Blokhina IEEE Transactions on Circuits and Systems II: Express Briefs 65 (6), 809-813, 2018 | 11 | 2018 |
Design of a 1.5 GHz Low jitter DCO Ring in 28 nm CMOS Process P Bisiaux, E Blokhina, E Koskin, T Siriburanon, D Galayko 2020 European Conference on Circuit Theory and Design (ECCTD), 1-5, 2020 | 9 | 2020 |
Simulation methodology for electron transfer in CMOS quantum dots A Sokolov, D Mishagli, P Giounanlis, I Bashir, D Leipold, E Koskin, ... Computational Science–ICCS 2020: 20th International Conference, Amsterdam …, 2020 | 8 | 2020 |
CMOS charge qubits and qudits: Entanglement entropy and mutual information as an optimization method to construct CNOT and SWAP gates P Giounanlis, X Wu, A Sokolov, N Petropoulos, E Koskin, I Bashir, ... Semiconductor Science and Technology 36 (9), 095014, 2021 | 7 | 2021 |
Path-based statistical static timing analysis for large integrated circuits in a weak correlation approximation D Mishagli, E Koskin, E Blokhina 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 7 | 2019 |
All digital phase-locked loop networks for clock generation and distribution: Network stability, convergence and performance E Koskin, P Bisiaux, D Galayko, E Blokhina IEEE Transactions on Circuits and Systems I: Regular Papers 68 (1), 406-415, 2020 | 5 | 2020 |
Jitter optimisation in a generalised all-digital phase-locked loop model E Koskin, P Bisiaux, D Galayko, E Blokhina IEEE Transactions on Circuits and Systems II: Express Briefs 68 (1), 77-81, 2020 | 4 | 2020 |
All-digital phase-locked loop arrays: Investigation of synchronisation and jitter performance through FPGA prototyping E Koskin, P Bisiaux, D Galayko, E Blokhina 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS), 1-4, 2019 | 4 | 2019 |
Semianalytical model for high speed analysis of all-digital PLL clock-generating networks E Koskin, D Galayko, O Feely, E Blokhina 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 3 | 2017 |
Averaging techniques for the analysis of event driven models of all digital PLLs E Koskin, D Galayko, E Blokhina 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 2 | 2018 |
Mode-locking in a network of kuramoto-like oscillators E Koskin, D Galayko, O Feely, E Blokhina 2015 International Joint Conference on Neural Networks (IJCNN), 1-6, 2015 | 2 | 2015 |
Electrostatic Control and Entanglement of CMOS Position-Based Qubits P Giounanlis, A Sokolov, E Blokhina, E Koskin, I Bashir, D Leipold, ... 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 1 | 2020 |
FPGA Validation of event-driven ADPLL E Koskin, P Bisioux, D Galayko, E Blokhina 2020 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2020 | 1 | 2020 |
Synchronisation in noisy PLL networks: Time domain model and its analysis E Koskin, M Balakin, N Ryskin, D Galayko, E Blokhina 2020 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2020 | 1 | 2020 |
Quantum Theory and Application of Contextual Optimal Transport N Mariella, A Akhriev, F Tacchino, C Zoufal, JC Gonzalez-Espitia, ... arXiv preprint arXiv:2402.14991, 2024 | | 2024 |
Gate--Level Statistical Timing Analysis: Exact Solutions, Approximations and Algorithms D Mishagli, E Koskin, E Blokhina arXiv preprint arXiv:2401.03588, 2024 | | 2024 |