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Vasu Gupta
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Two-terminal floating-gate transistors with a low-power memristive operation mode for analogue neuromorphic computing
L Danial, E Pikhay, E Herbelin, N Wainstein, V Gupta, N Wald, Y Roizin, ...
Nature Electronics 2 (12), 596-605, 2019
1012019
A 13.8-ENOB Fully Dynamic Third-Order Noise-Shaping SAR ADC in a Single-Amplifier EF-CIFF Structure With Hardware-Reusing kT/C Noise Cancellation
TH Wang, R Wu, V Gupta, X Tang, S Li
IEEE Journal of Solid-State Circuits, 2021
282021
27.3 A 13.8-ENOB 0.4pF-CIN 3rd-Order Noise-Shaping SAR in a Single-Amplifier EF-CIFF Structure with Fully Dynamic Hardware-Reusing kT/C Noise Cancelation
TH Wang, R Wu, V Gupta, S Li
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 374-376, 2021
182021
Modeling a floating-gate memristive device for computer aided design of neuromorphic computing
L Danial, V Gupta, E Pikhay, Y Roizin, S Kvatinsky
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 472-477, 2020
52020
Dimming DC–DC LED Drivers: Luminous Efficiency, Power Losses, & Best-in-Class
V Gupta, GA Rincón-Mora
IECON 2021–47th Annual Conference of the IEEE Industrial Electronics Society …, 2021
2021
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