Surface diffusion dewetting of thin solid films: Numerical method and application to Si∕ SiO 2 E Dornel, JC Barbe, F De Crécy, G Lacolle, J Eymery Physical Review B 73 (11), 115427, 2006 | 117 | 2006 |
How to control solid state dewetting: A short review F Leroy, F Cheynis, Y Almadori, S Curiotto, M Trautmann, JC Barbé, ... Surface Science Reports 71 (2), 391-409, 2016 | 109 | 2016 |
Challenges for 3D IC integration: bonding quality and thermal management P Leduc, F de Crecy, M Fayolle, B Charlet, T Enot, M Zussy, B Jones, ... 2007 IEEE International Interconnect Technology Conferencee, 210-212, 2007 | 105 | 2007 |
Nanoscaled MOSFET Transistors on Strained Si, SiGe, Ge Layers: Some Integration and Electrical Properties Features TP Ernst, F Andrieu, O Weber, JM Hartmann, C Dupre, O Faynot, ... ECS Transactions 3 (7), 947, 2006 | 86 | 2006 |
Novel 3D integration process for highly scalable Nano-Beam stacked-channels GAA (NBG) FinFETs with HfO2/TiN gate stack T Ernst, C Dupre, C Isheden, E Bernard, R Ritzenthaler, V Maffini-Alvaro, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 72 | 2006 |
Computer simulation of the microstructure and rheology of semi-solid alloys under shear M Perez, JC Barbé, Z Neda, Y Bréchet, L Salvo Acta materialia 48 (14), 3773-3782, 2000 | 65 | 2000 |
Hydrogen annealing of arrays of planar and vertically stacked Si nanowires E Dornel, T Ernst, JC Barbé, JM Hartmann, V Delaye, F Aussenac, ... Applied Physics Letters 91 (23), 233502, 2007 | 54 | 2007 |
Undulation of sub- porous dielectric structures: A mechanical analysis M Darnon, T Chevolleau, O Joubert, S Maitrejean, JC Barbe, J Torres Applied Physics Letters 91 (19), 194103, 2007 | 53 | 2007 |
Performance and design considerations for gate-all-around stacked-NanoWires FETs S Barraud, V Lapras, B Previtali, MP Samson, J Lacord, S Martinie, ... 2017 IEEE international electron devices meeting (IEDM), 29.2. 1-29.2. 4, 2017 | 45 | 2017 |
25nm Short and narrow strained FDSOI with TiN/HfO2 gate stack S Deleonibus, C Mazure, P Gaud, H Grampeix, JP Colonna, B Previtali, ... 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 134-135, 2006 | 41 | 2006 |
Comparative scalability of PVD and CVD TiN on HfO2 as a metal gate stack for FDSOI cMOSFETs down to 25nm gate length and width F Andrieu, O Faynot, X Garros, D Lafond, C Buj-Dufournet, L Tosti, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 35 | 2006 |
Leti-UTSOI2. 1: A compact model for UTBB-FDSOI technologies—Part II: DC and AC model description T Poiroux, O Rozeau, P Scheer, S Martinie, MA Jaud, M Minondo, A Juge, ... IEEE Transactions on Electron Devices 62 (9), 2760-2768, 2015 | 33 | 2015 |
Leti-UTSOI2. 1: A compact model for UTBB-FDSOI technologies—Part I: Interface potentials analytical model T Poiroux, O Rozeau, P Scheer, S Martinie, MA Jaud, M Minondo, A Juge, ... IEEE Transactions on Electron Devices 62 (9), 2751-2759, 2015 | 32 | 2015 |
Impact of Mobility Boosters (XsSOI, CESL, TiN gate) on the Performance of< 100> or< 110> oriented FDSOI cMOSFETs for the 32nm Node F Andrieu, O Faynot, F Rochette, JC Barbé, C Buj, Y Bogumilowicz, ... 2007 IEEE Symposium on VLSI Technology, 50-51, 2007 | 32 | 2007 |
Extended Analysis of the -FET: Operation as Capacitorless eDRAM C Navarro, J Lacord, MS Parihar, F Adamu-Lema, M Duan, N Rodriguez, ... IEEE Transactions on Electron Devices 64 (11), 4486-4491, 2017 | 30 | 2017 |
UTSOI2: A complete physical compact model for UTBB and independent double gate MOSFETs T Poiroux, O Rozeau, S Martinie, P Scheer, S Puget, MA Jaud, S El Ghouli, ... 2013 IEEE International Electron Devices Meeting, 12.4. 1-12.4. 4, 2013 | 29 | 2013 |
A review of the Z2-FET 1T-DRAM memory: Operation mechanisms and key parameters S Cristoloveanu, KH Lee, MS Parihar, H El Dirani, J Lacord, S Martinie, ... Solid-State Electronics 143, 10-19, 2018 | 27 | 2018 |
-FET as Capacitor-Less eDRAM Cell For High-Density Integration C Navarro, M Duan, MS Parihar, F Adamu-Lema, S Coseman, J Lacord, ... IEEE Transactions on Electron Devices 64 (12), 4904-4909, 2017 | 25 | 2017 |
Fluid system for two hydraulic circuits having a common source of pressurized fluid DP Smith US Patent 6,681,568, 2004 | 24 | 2004 |
Parasitic capacitance analytical model for sub-7-nm multigate devices J Lacord, S Martinie, O Rozeau, MA Jaud, S Barraud, JC Barbé IEEE Transactions on Electron Devices 63 (2), 781-786, 2015 | 21 | 2015 |