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Tomer Morad
Tomer Morad
Verified email at tx.technion.ac.il
Title
Cited by
Cited by
Year
Performance, power efficiency and scalability of asymmetric cluster chip multiprocessors
TY Morad, UC Weiser, A Kolodny, M Valero, E Ayguade
In Computer Architecture Letters, Vol, 2005
2682005
Targeted content with broadcast material
A Morad, L Yavits, TY Morad
US Patent App. 11/818,971, 2008
1312008
THREE-DIMENSIONAL INTERACTIVE SYSTEM AND METHOD
TY Morad, H Weller
US Patent App. 12/396,565, 2009
652009
Real time navigation and advertising platform for public transportation
P Pechenick, TY Morad, T Chen
US Patent 7,595,740, 2009
282009
Stereoscopic three-dimensional interactive system and method
H Weller, TY Morad
US Patent App. 12/396,541, 2009
282009
Generalized MultiAmdahl: optimization of heterogeneous multi-accelerator SoC
A Morad, TY Morad, Y Leonid, R Ginosar, U Weiser
IEEE Computer Architecture Letters 13 (1), 37-40, 2014
272014
ACCMP-Asymmetric Chip Multi-Processing
TY Morad, U Weiser, A Kolodny
CCIT Technical Report, 2004
25*2004
ACCMP-Asymmetric Cluster Chip Multi-Processing
TY Morad, UC Weiser, A Kolodny
Technion-IIT, Department of Electrical Engineering, 2004
252004
Scheduling multiple multithreaded applications on asymmetric and symmetric chip multiprocessors
TY Morad, A Kolodny, UC Weiser
2010 3rd International Symposium on Parallel Architectures, Algorithms and …, 2010
122010
METHOD FOR PATCHING ROM BOOT CODE
TY Morad, S Finestein, AE Hazbany, V Kogan
US Patent App. 12/256,881, 2008
112008
TRUE RANDOM NUMBER GENERATOR
TY Morad
US Patent App. 12/164,234, 2008
62008
EFS: Energy-Friendly Scheduler for memory bandwidth constrained systems
TY Morad, N Shalev, I Keidar, A Kolodny, UC Weiser
Journal of Parallel and Distributed Computing 95, 3-14, 2016
52016
Techniques for self-tuning of computing systems
T Morad
US Patent 9,958,931, 2018
32018
System and Method for Adding Advertisements to Information Display Systems
TY Morad, S Crown, S Daniel
US Patent App. 13/521,247, 2011
32011
AUTOMOTIVE ENTERTAINMENT, COMMUNICATION, NAVIGATION AND CONTROL CENTER
TY Morad, L Yavits, A Morad
US Patent App. 12/355,820, 2009
32009
Optimization of Asymmetric and Heterogeneous MultiCore
A Morad, T Morad, L Yavits, R Ginosar
22013
Method For Accurately Timing Stations On A Public Transportation Route
TY Morad, S Daniel, G Cohen
US Patent App. 13/640,487, 2010
22010
Very long arithmetic logic unit for security processor
TY Morad, A Hazbany
US Patent App. 11/785,363, 2007
22007
Optimizing Read-Once Data Flow in Big-Data Applications
TY Morad, G Shomron, M Erez, A Kolodny, UC Weiser
IEEE Computer Architecture Letters 16 (1), 68-71, 2017
12017
Task Scheduling Based On Thread Essence and Resource Limitations
TY Morad, A Kolodny, UC Weiser
Journal of Computers 7 (1), 53-64, 2012
12012
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