Christopher W. Fletcher
Christopher W. Fletcher
Verified email at illinois.edu - Homepage
Title
Cited by
Cited by
Year
Path ORAM: an extremely simple oblivious RAM protocol
E Stefanov, M Van Dijk, E Shi, C Fletcher, L Ren, X Yu, S Devadas
Proceedings of the 2013 ACM SIGSAC conference on Computer & communications …, 2013
6962013
A secure processor architecture for encrypted computation on untrusted programs
CW Fletcher, M Dijk, S Devadas
Proceedings of the seventh ACM workshop on Scalable trusted computing, 3-8, 2012
1822012
Constants Count: Practical Improvements to Oblivious {RAM}
L Ren, C Fletcher, A Kwon, E Stefanov, E Shi, M Van Dijk, S Devadas
24th {USENIX} Security Symposium ({USENIX} Security 15), 415-430, 2015
165*2015
Onion ORAM: A constant bandwidth blowup oblivious RAM
S Devadas, M van Dijk, CW Fletcher, L Ren, E Shi, D Wichs
Theory of Cryptography Conference, 145-174, 2016
1392016
Design space exploration and optimization of path oblivious ram in secure processors
L Ren, X Yu, CW Fletcher, M Van Dijk, S Devadas
Proceedings of the 40th Annual International Symposium on Computer …, 2013
1232013
Freecursive ORAM: [Nearly] Free Recursion and Integrity Verification for Position-based Oblivious RAM
CW Fletcher, L Ren, A Kwon, M Van Dijk, S Devadas
Proceedings of the Twentieth International Conference on Architectural …, 2015
90*2015
Suppressing the Oblivious RAM timing channel while making information leakage and program efficiency trade-offs
CW Fletcher, L Ren, X Yu, M van Dijk, O Khan, S Devadas
High Performance Computer Architecture (HPCA), 2014 IEEE 20th International …, 2014
872014
Invisispec: Making speculative execution invisible in the cache hierarchy
M Yan, J Choi, D Skarlatos, A Morrison, C Fletcher, J Torrellas
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018
762018
ZeroTrace: Oblivious Memory Primitives from Intel SGX.
S Sasy, S Gorbunov, CW Fletcher
IACR Cryptol. ePrint Arch. 2017, 549, 2017
762017
Hornet: A cycle-level multicore simulator
P Ren, M Lis, MH Cho, KS Shim, CW Fletcher, O Khan, N Zheng, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012
732012
Scalable, accurate multicore simulation in the 1000-core era
M Lis, P Ren, MH Cho, KS Shim, CW Fletcher, O Khan, S Devadas
(IEEE ISPASS) IEEE International Symposium on Performance Analysis of …, 2011
732011
MARC: A many-core approach to reconfigurable computing
I Lebedev, S Cheng, A Doupnik, J Martin, C Fletcher, D Burke, M Lin, ...
2010 international conference on reconfigurable computing and FPGAs, 7-12, 2010
662010
Ucnn: Exploiting computational reuse in deep neural networks via weight repetition
K Hegde, J Yu, R Agrawal, M Yan, M Pellauer, C Fletcher
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
642018
A low-latency, low-area hardware oblivious RAM controller
CW Fletcher, L Ren, A Kwon, M Van Dijk, E Stefanov, D Serpanos, ...
2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom …, 2015
63*2015
Integrity verification for path oblivious-ram
L Ren, CW Fletcher, X Yu, M Van Dijk, S Devadas
2013 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2013
452013
Attack directories, not caches: Side channel attacks in a non-inclusive world
M Yan, R Sprabery, B Gopireddy, C Fletcher, R Campbell, J Torrellas
2019 IEEE Symposium on Security and Privacy (SP), 888-904, 2019
442019
Bucket ORAM: Single Online Roundtrip, Constant Bandwidth Oblivious RAM.
CW Fletcher, M Naveed, L Ren, E Shi, E Stefanov
IACR Cryptol. ePrint Arch. 2015, 1065, 2015
412015
Cache telepathy: Leveraging shared resource attacks to learn DNN architectures
M Yan, C Fletcher, J Torrellas
arXiv preprint arXiv:1808.04761 15, 38, 2018
402018
HOP: Hardware makes Obfuscation Practical.
K Nayak, CW Fletcher, L Ren, N Chandran, SV Lokam, E Shi, V Goyal
NDSS, 2017
402017
Proram: dynamic prefetcher for oblivious ram
X Yu, SK Haider, L Ren, C Fletcher, A Kwon, M Van Dijk, S Devadas
2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture …, 2015
38*2015
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