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Sherif Tawfik
Sherif Tawfik
Unknown affiliation
Verified email at intel.com
Title
Cited by
Cited by
Year
Low power and robust 7T dual-Vt SRAM circuit
SA Tawfik, V Kursun
2008 IEEE International Symposium on Circuits and Systems, 1452-1455, 2008
1262008
Low-power and compact sequential circuits with independent-gate FinFETs
SA Tawfik, V Kursun
IEEE Transactions on electron devices 55 (1), 60-70, 2007
1242007
Independent-gate and tied-gate FinFET SRAM circuits: Design guidelines for reduced area and enhanced stability
SA Tawfik, Z Liu, V Kursun
2007 Internatonal Conference on Microelectronics, 171-174, 2007
892007
Low power and high speed multi threshold voltage interface circuits
SA Tawfik, V Kursun
IEEE transactions on very large scale integration (VLSI) systems 17 (5), 638-645, 2009
622009
FinFET domino logic with independent gate keepers
SA Tawfik, V Kursun
Microelectronics Journal 40 (11), 1531-1540, 2009
572009
Multi-threshold voltage FinFET sequential circuits
SA Tawfik, V Kursun
IEEE transactions on very large scale integration (VLSI) systems 19 (1), 151-156, 2009
482009
Leakage-aware design of nanometer SoC
V Kursun, SA Tawfik, Z Liu
2007 IEEE International Symposium on Circuits and Systems, 3231-3234, 2007
482007
Multi-Vth level conversion circuits for multi-VDD systems
SA Tawfik, V Kursun
2007 IEEE International Symposium on Circuits and Systems, 1397-1400, 2007
362007
Dual supply voltages and dual clock frequencies for lower clock power and suppressed temperature-gradient-induced clock skew
SA Tawfik, V Kursun
IEEE transactions on very large scale integration (VLSI) systems 18 (3), 347-355, 2009
322009
High speed FinFET domino logic circuits with independent gate-biased double-gate keepers providing dynamically adjusted immunity to noise
SA Tawfik, V Kursun
2007 Internatonal Conference on Microelectronics, 175-178, 2007
322007
An independent-gate FinFET SRAM cell for high data stability and enhanced integration density
Z Liu, SA Tawfik, V Kursun
2007 IEEE International SOC Conference, 63-66, 2007
322007
Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits
SA Tawfik, V Kursun
2008 IEEE International Symposium on Circuits and Systems, 788-791, 2008
292008
FinFET technology development guidelines for higher performance, lower power, and stronger resilience to parameter variations
SA Tawfik, V Kursun
2009 52nd IEEE International Midwest Symposium on Circuits and Systems, 431-434, 2009
282009
Statistical data stability and leakage evaluation of FinFET SRAM cells with dynamic threshold voltage tuning under process parameter fluctuations
Z Liu, SA Tawfik, V Kursun
9th International Symposium on Quality Electronic Design (isqed 2008), 305-310, 2008
262008
Portfolio of FinFET memories: Innovative techniques for an emerging technology
SA Tawfik, V Kursun
2008 International SoC Design Conference 1, I-101-I-104, 2008
252008
Compact FinFET memory circuits with p-type data access transistors for low leakage and robust operation
SA Tawfik, V Kursun
9th International Symposium on Quality Electronic Design (isqed 2008), 855-860, 2008
222008
Characterization of new static independent-gate-biased FinFET latches and flip-flops under process variations
SA Tawfik, V Kursun
9th International Symposium on Quality Electronic Design (isqed 2008), 311-316, 2008
212008
Low power and stable FinFET SRAM with static independent gate bias for enhanced integration density
SA Tawfik, V Kursun
2007 14th IEEE International Conference on Electronics, Circuits and Systems …, 2007
212007
Dual-V_DD Clock Distribution for Low Power and Minimum Temperature Fluctuations Induced Skew
SA Tawfik, V Kursun
8th International Symposium on Quality Electronic Design (ISQED'07), 73-78, 2007
212007
Robust FinFET memory circuits with p-type data access transistors for higher integration density and reduced leakage power
SA Tawfik, V Kursun
Journal of Low Power Electronics 5 (4), 497-508, 2009
162009
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