| A computational study of a carbon nanotube junctionless tunneling field-effect transistor (CNT-JLTFET) based on the charge plasma concept SH Tahaei, SS Ghoreishi, R Yousefi, H Aderang Superlattices and Microstructures 125, 168-176, 2019 | 31 | 2019 |
| Remarks on transient amplitude analysis of MOS cross-coupled oscillators A Ebrahimi, HM Naimi, H Adrang IEICE transactions on electronics 94 (2), 231-239, 2011 | 16 | 2011 |
| All-optical OR, NOT and XOR gates based on linear photonic crystal with high port-to-port isolation SE Kordi, R Yousefi, SS Ghoreishi, H Adrang Applied Physics B 126 (10), 169, 2020 | 15 | 2020 |
| A low-power CMOS Gm-C filter for wireless receiver applications with on-chip automatic tuning system H Adrang, R Lotfi, K Mafinejhad, A Tajalli, S Mehrmanesh 2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp., 2006 | 14 | 2006 |
| Ultrafast all-optical half-adder and half-subtractor based on linear 2D photonic crystal SE Kordi, R Yousefi, SS Ghoreishi, H Adrang Optical and Quantum Electronics 53, 1-16, 2021 | 12 | 2021 |
| A Type III fast locking time PLL with transconductor-C structure H Adrang, HM Naeimi 2009 52nd IEEE International Midwest Symposium on Circuits and Systems, 58-61, 2009 | 12 | 2009 |
| Modeling of jitter in bang-bang CDR with Fourier series analysis H Adrang, H Miar-Naimi IEEE Transactions on Circuits and Systems I: Regular Papers 60 (1), 3-10, 2012 | 9 | 2012 |
| Quantum simulation of a junctionless carbon nanotube field-effect transistor under torsional strain S Moghaddam, SS Ghoreishi, R Yousefi, H Aderang Superlattices and Microstructures 138, 106239, 2020 | 6 | 2020 |
| A computational study of a heterostructure tunneling carbon nanotube field-effect transistor SH Tahaei, SS Ghoreishi, R Yousefi, H Aderang Journal of Electronic Materials 48 (11), 7048-7054, 2019 | 6 | 2019 |
| Nonlinear analysis of VCO jitter generation using Volterra series H Dehbovid, H Adarang, MB Tavakoli COMPEL-The international journal for computation and mathematics in …, 2018 | 6 | 2018 |
| Nonlinear analysis of jitter transfer in charge pump phase-locked loops regarding channel length modulation effect H Dehbovid, H Adarang, MB Tavakoli NASHRIYYAH-I MUHANDISI-I BARQ VA MUHANDISI-I KAMPYUTAR-I IRAN, A-MUHANDISI-I …, 2018 | 5 | 2018 |
| Nonlinear analysis of BBCDR jitter generation using Volterra series H Adrang, HM Naimi IEEE Transactions on Circuits and Systems II: Express Briefs 60 (4), 197-201, 2013 | 5 | 2013 |
| Analysis of settlingtime in charge pump phase-locked loops regarding non-ideal effect H Dehbovid, H Adarang, H Rabiee Nashriyyah-I Muhandisi-I Barq va Muhandisi-I Kampyutar-I Iran, A-Muhandisi-I …, 2022 | 4 | 2022 |
| A Numerical Study of the Nanoribbon Field-Effect Transistors Under the Ballistic and Dissipative Transport HA SS Ghoreishi, R Yousefi, K Saghafi International Nano Letters, 2017 | 4 | 2017 |
| Theoretical analysis of tunneling GNRFET under local compressive uniaxial strain S Abbaszadeh, SS Ghoreishi, R Yousefi, H Aderang ECS Journal of Solid State Science and Technology 9 (2), 021002, 2020 | 3 | 2020 |
| A novel method for analysis and design of third-order charge pump PLL H Adrang, HM Naeimi 2009 European Conference on Circuit Theory and Design, 591-594, 2009 | 3 | 2009 |
| Four stage CMOS operational amplifier, frequency compensated via active miller network M Attar, H Dehbovid, A Ghorbani, H Adarang Engineering Reports, e12810, 2023 | 1 | 2023 |
| Analysis Of Slew Rate And Settling Time In Two Stage Cmos Operational Amplifiers With Cascode Compensation H Gholamnataj, H ADARANG, SS MOHSENI, SS Ghoreishi NASHRIYYAH-I MUHANDISI-I BARQ VA MUHANDISI-I KAMPYUTAR-I IRAN, A-MUHANDISI-I …, 2022 | 1 | 2022 |
| Computational study of bandgap-engineered Graphene nano ribbon tunneling field-effect transistor (BE-GNR-TFET) S Abbaszadeh, SS Ghoreishi, R Yousefi, H Adarang International Journal of Nano Dimension 11 (4), 392-398, 2020 | 1 | 2020 |
| A new step response modeling in CMOS operational amplifiers H Gholamnataj, H Adarang, SS Mohseni, SS Ghoreishi Analog Integrated Circuits and Signal Processing 101 (1), 45-55, 2019 | 1 | 2019 |
