Triple material surrounding gate (TMSG) nanoscale tunnel FET-analytical modeling and simulation P Vanitha, NB Balamurugan, GL Priya JSTS: Journal of Semiconductor Technology and Science 15 (6), 585-593, 2015 | 22 | 2015 |
A new 2 D mathematical modeling of surrounding gate triple material tunnel FET using halo engineering for enhanced drain current P Vanitha, TSA Samuel, D Nirmal AEU-International Journal of Electronics and Communications 99, 34-39, 2019 | 20 | 2019 |
TWO DIMENSIONAL ANALYTICAL MODELING OF A NANOSCALE DUAL MATERIAL GATE MOSFETS BNB Suveetha.P,Vanitha.P International Journal of Advanced Science and Technology 18 (May 2010), 49-57, 2010 | 7* | 2010 |
Performance Investigation of Ge Based Pocket Doped TMSG-TFET with a SiO2/HFO2 Stacked Gate Oxide Structure for Enhanced Drain Current for Low Power … P Vanitha, TS Arun Samuel, P Vimala Silicon 14 (17), 11209-11218, 2022 | 3 | 2022 |
2-D Analytical Modeling and Simulation of Dual Material Surrounding Gate Tunnel FET (DMSGTFET) For Diminished SCES ASTS Vanitha.P , Balamurugan.N.B International Journal of Applied Engineering Research 10 (7), 18551-18564, 2015 | 2 | 2015 |
Analytical approach on the scale length model for tri-material surrounding gate tunnel field-effect transistors (TMSG-TFETs) P Vanitha, G Lakshmi Priya, NB Balamurugan, S Theodore Chandra, ... Intelligent Computing and Applications: Proceedings of the International …, 2015 | 1 | 2015 |
Scope with TFET-based circuit and system design PS Dhanaselvam, B Karthikeyan, P Vanitha, P Anand Device Circuit Co-Design Issues in FETs, 181-188, 2023 | | 2023 |
Basic Science and Development of Subthreshold Swing Technology PS Dhanaselvam, DS Kumar, B Karthikeyan, P Vanitha Tunneling Field Effect Transistors, 17-27, 2023 | | 2023 |
Performance Investigation of Ge Based Pocket Doped TMSG-TFET with a SiO2/HFO2 Stacked Gate Oxide Structure for Enhanced Drain Current for Low Power Applications PV P.Vanitha, T.S.Arun Samuel Silicon Springer, 2022 | | 2022 |
2-D Analytical Modeling and Simulation of Dual Material Surrounding Gate Tunnel Field Effect Transistor with halo doping DNBB Vanitha.P International Journal Of Applied Engineering and Research 10 (13), 32853-32857, 2015 | | 2015 |
Analytical Approach on the scale length model for Tri-Matrial SuroundingGate Tunnel Field Effect Transistors NBB Vanitha.P,LakshmiPriya.G Proceedings of Springer Intelligent Computing and applications 343, 2014 | | 2014 |
Scaling Theory for the Effective Conducting Path Effect of Triple Matrerial Surrounding Gate (TMSG) Tunnel Field Effect Transistors BNB Vanitha.P,LakshmiPriya.G IEEE International Conference on Emerging Trends in VLSI,Embedded Systems …, 2014 | | 2014 |
A 2D ANALYTICAL SURFACE POTENTIAL MODEL FOR DUAL MATERIAL GATE MOSFETS WITH REDUCED SHORT CHANNEL EFFECTS” BNB Vanitha.P,Suveetha Dhanaselvam.P International Conference on Nano materials-ICON 2010, 2010 | | 2010 |
FPGA Implementation of Real Time Object Tracking V P NCCT'08, 2008 | | 2008 |
Two Dimensional Analytical Modeling Of A Nanoscale Dual Material Gate MOSFETS PSDDNB Balamurugan, P Vanitha, ST Chandra | | |