Jeanine Cook
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The structural simulation toolkit
AF Rodrigues, KS Hemmert, BW Barrett, C Kersey, R Oldfield, M Weston, ...
ACM SIGMETRICS Performance Evaluation Review 38 (4), 37-42, 2011
The clinical and cost-effectiveness of total versus partial knee replacement in patients with medial compartment osteoarthritis (TOPKAT): 5-year outcomes of a randomised …
DJ Beard, LJ Davies, JA Cook, G MacLennan, A Price, S Kent, J Hudson, ...
The Lancet 394 (10200), 746-756, 2019
Site-directed mutagenesis of glycosylation sites in the transforming growth factor-beta 1 (TGF beta 1) and TGF beta 2 (414) precursors and of cysteine residues within mature …
AM Brunner, MN Lioubin, H Marquardt, AR Malacko, WC Wang, ...
Molecular endocrinology 6 (10), 1691-1700, 1992
Abstract machine models and proxy architectures for exascale computing
JA Ang, RF Barrett, RE Benner, D Burke, C Chan, J Cook, D Donofrio, ...
2014 Hardware-Software Co-Design for High Performance Computing, 25-32, 2014
Using performance-power modeling to improve energy efficiency of HPC applications
X Wu, V Taylor, J Cook, PJ Mucci
Computer 49 (10), 20-29, 2016
The performance implication of task size for applications on the hpx runtime system
P Grubel, H Kaiser, J Cook, A Serio
2015 IEEE International Conference on Cluster Computing, 682-689, 2015
Examining performance differences in workload execution phases
J Cook, RL Oliver, EE Johnson
Proceedings of the Fourth Annual IEEE International Workshop on Workload …, 2001
Improved estimation for software multiplexing of performance counters
W Mathur, J Cook
13th IEEE International Symposium on Modeling, Analysis, and Simulation of …, 2005
Performance modeling using monte carlo simulation
R Srinivasan, J Cook, O Lubeck
IEEE Computer Architecture Letters 5 (1), 38-41, 2006
Fast, accurate microarchitecture simulation using statistical phase detection
R Srinivasan, J Cook, S Cooper
IEEE International Symposium on Performance Analysis of Systems and Software …, 2005
Toward accurate performance evaluation using hardware counters
W Mathur, J Cook
ITEA Modeling and Simulation Workshop, 23-32, 2003
Quantitative performance assessment of proxy apps and parents
DF Richards, O Aziz, J Cook, H Finkel, B Homerding, T Judeman, ...
Lawrence Livermore National Lab.(LLNL), Livermore, CA (United States …, 2018
The superstrider architecture: Integrating logic and memory towards non-von Neumann computing
S Srikanth, TM Conte, EP DeBenedictis, J Cook
2017 IEEE International Conference on Rebooting Computing (ICRC), 1-8, 2017
Ultra-fast cpu performance prediction: Extending the monte carlo approach
R Srinivasan, J Cook, O Lubeck
2006 18th International Symposium on Computer Architecture and High …, 2006
ASC tri-lab co-design level 2 milestone report 2015
R Hornung, H Jones, J Keasler, R Neely, O Pearce, S Hammond, C Trott, ...
Lawrence Livermore National Lab.(LLNL), Livermore, CA (United States), 2015
A FPGA implementation of a MIPS RISC processor for computer architecture education
V Robio, J Cook
New Mexico State University, MSc. Thesis, 2004
A methodology for characterizing the correspondence between real and proxy applications
O Aaziz, J Cook, J Cook, T Juedeman, D Richards, C Vaughan
2018 IEEE International Conference on Cluster Computing (CLUSTER), 190-200, 2018
Extending Moore’s law via computationally error-tolerant computing
B Deng, S Srikanth, ER Hein, TM Conte, E Debenedictis, J Cook, ...
ACM Transactions on Architecture and Code Optimization (TACO) 15 (1), 1-27, 2018
Lmstr: Local memory store the case for hardware controlled scratchpad memory for general purpose processors
NA Siddique, AHA Badawy, J Cook, D Resnick
2016 IEEE 35th International Performance Computing and Communications …, 2016
Using intrinsic performance counters to assess efficiency in task-based parallel applications
P Grubel, H Kaiser, K Huck, J Cook
2016 IEEE International Parallel and Distributed Processing Symposium …, 2016
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