| FPGA implementation of pairings using residue number system and lazy reduction R Cheung, S Duquesne, J Fan, N Guillermin, I Verbauwhede, G Yao Cryptographic Hardware and Embedded Systems–CHES 2011, 421-441, 2011 | 107 | 2011 |
| Faster Pairing Coprocessor Architecture GX Yao, J Fan, RCC Cheung, I Verbauwhede Pairing-Based Cryptography–Pairing 2012, 160-176, 2013 | 43 | 2013 |
| Parameter space for the architecture of FFT-based Montgomery modular multiplication DD Chen, GX Yao, RCC Cheung, D Pao, CK Koç IEEE Transactions on Computers 65 (1), 147-160, 2015 | 33 | 2015 |
| Novel RNS parameter selection for fast modular multiplication GX Yao, J Fan, RCC Cheung, I Verbauwhede IEEE Transactions on Computers 63 (8), 2099-2105, 2013 | 24 | 2013 |
| A high speed pairing coprocessor using RNS and lazy reduction GX Yao, J Fan, RCC Cheung, I Verbauwhede Cryptology ePrint Archive, Report 2011/258, 2011. http://eprint. iacr. org, 2011 | 21 | 2011 |
| Reconfigurable number theoretic transform architectures for cryptographic applications GX Yao, RCC Cheung, ÇK Koç, KF Man 2010 International Conference on Field-Programmable Technology, 308-311, 2010 | 12 | 2010 |
| Low Complexity and Hardware-friendly Spectral Modular Multiplication D Chen, GX Yao, CK Koç, RCC Cheung | 7* | |
| Side channel attacks and their low overhead countermeasures on residue number system multipliers GX Yao, M Stöttinger, RCC Cheung, SA Huss Emerging Technology and Architecture for Big-data Analytics, 137-158, 2017 | 2 | 2017 |
| Counter Embedded Memory architecture for trusted computing platform GX Yao, RCC Cheung, KF Man Proceedings of 2010 21st IEEE International Symposium on Rapid System …, 2010 | 2 | 2010 |
| Zero collision attack and its countermeasures on Residue Number System multipliers M Stöttinger, GX Yao, RCC Cheung 2014 International Symposium on Integrated Circuits (ISIC), 30-33, 2014 | 1 | 2014 |
Ray C.C. CheungAssociate Provost (Digital Learning), Professor of Computer Engineering, City University of HongVerified email at cityu.edu.hk
