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Arun Samuel
Arun Samuel
Verified email at nec.edu.in
Title
Cited by
Cited by
Year
Analytical modelling and simulation of single-gate SOI TFET for low-power applications
TS Samuel, NB Balamurugan, S Bhuvaneswari, D Sharmila, ...
INTERNATIONAL JOURNAL OF ELECTRONICS 101 (6), 779-788, 2014
472014
IoT BASED MILK MONITORING SYSTEM FOR DETECTION OF MILK ADULTERATION
G Rajakumar, TA Kumar, TSA Samuel, E Muthu
International Journal of Pure and Applied Mathematics 118 (9), 21-32, 2018
352018
A holistic approach on Junctionless dual material double gate (DMDG) MOSFET with high k gate stack for low power digital applications
S Darwin, TS Arun Samuel
silicon 12 (2), 393-403, 2020
342020
Performance enhancement of triple material double gate TFET with heterojunction and heterodielectric
P Vimala, TSA Samuel, D Nirmal, AK Panda
Solid State Electronics Letters 1 (2), 64-72, 2019
282019
Analytical modeling and simulation of dual material gate tunnel field effect transistors
TS Samuel, NB Balamurugan, S Sibitha, R Saranya, D Vanisri
Journal of Electrical Engineering and Technology 8 (6), 1481-1486, 2013
252013
An analytical modeling and simulation of dual material double gate tunnel field effect transistor for low power applications
TS Arun Samuel, NB Balamurugan
Journal of electrical engineering and technology 9 (1), 247-253, 2014
232014
Impact of uniform and non-uniform doping variations for ultrathin body junctionless FinFETs
S Manikandan, NB Balamurugan, TSA Samuel
Materials Science in Semiconductor Processing 104, 104653, 2019
202019
Performance analysis of triple material tri gate TFET using 3D analytical modelling and TCAD simulation
S Komalavalli, TSA Samuel, P Vimala
AEU-International Journal of Electronics and Communications 110, 152842, 2019
202019
A new 2 D mathematical modeling of surrounding gate triple material tunnel FET using halo engineering for enhanced drain current
P Vanitha, TSA Samuel, D Nirmal
AEU-International Journal of Electronics and Communications 99, 34-39, 2019
202019
Performance investigation of gate engineered tri-gate SOI TFETs with different high-K dielectric materials for low power applications
P Vimala, TSA Samuel, MK Pandian
Silicon 12 (8), 1819-1829, 2020
192020
TCAD simulation study of single-, double-, and triple-material gate engineered trigate FinFETs
P Vimala, TS Arun Samuel
Semiconductors 54, 501-505, 2020
192020
An analytical modeling and simulation of dual material double gate tunnel field effect transistor for low power applications
TSA Samuel, NB Balamurugan
Journal of Electrical Engineering & Technology 9 (1), 247-253, 2014
182014
Triple metal surrounding gate junctionless tunnel FET based 6T SRAM design for low leakage memory system
GL Priya, M Venkatesh, NB Balamurugan, TSA Samuel
Silicon 13, 1691-1702, 2021
172021
Analytical surface potential model with TCAD simulation verification for evaluation of surrounding gate TFET
TS Samuel, NB Balamurugan, T Niranjana, B Samyuktha
Journal of Electrical Engineering and Technology 9 (2), 655-661, 2014
162014
Investigation of ON current and subthreshold swing of an InSb/Si heterojunction stacked oxide double-gate TFET with graphene nanoribbon
TSA Samuel, M Venkatesh, MK Pandian, P Vimala
Journal of Electronic Materials 50, 7037-7043, 2021
152021
Performance evaluation of gate engineered InAs–Si heterojunction surrounding gate TFET
M Sathishkumar, TSA Samuel, K Ramkumar, IV Anand, SB Rahi
Superlattices and Microstructures 162, 107099, 2022
142022
A novel 2-D analytical model for the electrical characteristics of a gate-all-around heterojunction tunnel field-effect transistor including depletion regions
C Usha, P Vimala, TSA Samuel, MK Pandian
Journal of Computational Electronics 19, 1144-1153, 2020
142020
Investigation of cylindrical channel gate all around InGaAs/InP heterojunction heterodielectric tunnel FETs
P Vimala, TS Arun Samuel
Silicon 13 (11), 3899-3907, 2021
132021
Impact of two gate oxide with no junction metal oxide semiconductor field effect transistor-an analytical model
S Darwin, TSA Samuel, P Vimala
Physica E: Low-dimensional Systems and Nanostructures 118, 113803, 2020
132020
A detailed roadmap from single gate to heterojunction TFET for next generation devices
JE Jeyanthi, TSA Samuel, AS Geege, P Vimala
Silicon 14 (7), 3185-3197, 2022
122022
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