Vasilis F. Pavlidis

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Eby G. FriedmanDistinguished Professor, University of RochesterVerified email at ece.rochester.edu
Giovanni De MicheliEPFL, StanfordVerified email at epfl.ch
Ioannis SavidisAssociate Professor, Drexel UniversityVerified email at coe.drexel.edu
XU HuEPFLVerified email at epfl.ch
Dimitrios SoudrisProfessor, Electrical & Computer Eng., National Technical Univ. of AthensVerified email at microlab.ntua.gr
Ioannis A. PapistasR&D Engineer, axelera.aiVerified email at axelera.ai
Kostas SioziosAssociate Professor, Department of Physics, Aristotle University of Thessaloniki (Greece)Verified email at auth.gr
Shashikanth BobbaMindmaze, EPFL, Stanford, 3D-EDA, Ericsson AB, Agilent TechnologiesVerified email at mindmaze.ch
Yi-Chung ChenTennessee State UniversityVerified email at tnstate.edu
Ashutosh Chakraborty, PhDSynopsys Inc.Verified email at ieee.org
Wayne BurlesonUniversity of Massachusetts AmherstVerified email at ecs.umass.edu
Xifan TANGLNIS, The University of UtahVerified email at utah.edu
Ioannis TsioutsiosYale UniversityVerified email at yale.edu
Konstantinos MaragosPh.D. candidate at school of ECE, National Technicl University AthensVerified email at microlab.ntua.gr
George LentarisNTUAVerified email at microlab.ntua.gr
Kyriakos SgouropoulosDemocritus University of ThraceVerified email at ee.duth.gr
Konstantinos TatasFrederick UniversityVerified email at frederick.ac.cy
David AtienzaProfessor of Electrical and Computer Engineering, EPFLVerified email at epfl.ch
Harry KalargarisPhD, University of Manchester

Vasilis F. Pavlidis

Computer Science and University of Manchester

Verified email at cs.man.ac.uk - Homepage

Electrical engineering


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3-D topologies for networks-on-chip VF Pavlidis, EG Friedman Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 15 (10 …, 2007	562	2007
Three-dimensional integrated circuit design VF Pavlidis, EG Friedman Morgan Kaufmann Pub, 2009	420*	2009
Three-dimensional integrated circuits VF Pavlidis, EG Friedman Burlington, MA: Morgan Kaufmann, 2009	417*	2009
Performance analysis of 3-D monolithic integrated circuits S Bobba, A Chakraborty, O Thomas, P Batude, VF Pavlidis, G De Micheli 2010 IEEE International 3D Systems Integration Conference (3DIC), 1-4, 2010	181	2010
Interconnect-based design methodologies for three-dimensional integrated circuits VF Pavlidis, EG Friedman Proceedings of the IEEE 97 (1), 123-140, 2009	137	2009
Clock distribution networks for 3-D integrated Circuits VF Pavlidis, I Savidis, EG Friedman Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE, 651-654, 2008	78	2008
Clock distribution networks in 3-D integrated systems VF Pavlidis, I Savidis, EG Friedman IEEE Transactions on very large scale integration (VLSI) systems 19 (12 …, 2011	57	2011
Analytical heat transfer model for thermal through-silicon vias H Xu, VF Pavlidis, G De Micheli Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011, 1-6, 2011	49	2011
Interconnect delay minimization through interlayer via placement in 3-D ICs VF Pavlidis, EG Friedman Proceedings of the 15th ACM Great Lakes symposium on VLSI, 20-25, 2005	36	2005
A novel framework for exploring 3-D FPGAs with heterogeneous interconnect fabric K Siozios, VF Pavlidis, D Soudris ACM Transactions on Reconfigurable Technology and Systems (TRETS) 5 (1), 4, 2012	27	2012
Power distribution paths in 3-D ICS VF Pavlidis, G De Micheli Proceedings of the 19th ACM Great Lakes symposium on VLSI, 263-268, 2009	26	2009
Miniaturized SIW Bandpass Filter Based on TSV Technology for THz Applications F Wang, VF Pavlidis, N Yu IEEE Transactions on Terahertz Science and Technology, 2020	20	2020
Effect of process variations in 3D global clock distribution networks H Xu, VF Pavlidis, G De Micheli ACM Journal on Emerging Technologies in Computing Systems (JETC) 8 (3), 20, 2012	20	2012
A software-supported methodology for designing high-performance 3D FPGA architectures K Siozios, K Sotiriadis, VF Pavlidis, D Soudris 2007 IFIP International Conference on Very Large Scale Integration, 54-59, 2007	20	2007
The combined effect of process variations and power supply noise on clock skew and jitter H Xu, VF Pavlidis, W Burleson, G De Micheli Quality Electronic Design (ISQED), 2012 13th International Symposium on, 320-327, 2012	18	2012
Via placement for minimum interconnect delay in three-dimensional (3D) circuits VF Pavlidis, EG Friedman 2006 IEEE International Symposium on Circuits and Systems, 4 pp.-4590, 2006	16	2006
Bandwidth-to-area comparison of through silicon vias and inductive links for 3-D ICs IA Papistas, VF Pavlidis 2015 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2015	15	2015
Exploring alternative 3D FPGA architectures: design methodology and CAD tool support K Siozios, K Sotiriadis, VF Pavlidis, D Soudris Field Programmable Logic and Applications, 2007. FPL 2007. International …, 2007	15	2007
Interconnect design tradeoffs for silicon and glass interposers H Kalargaris, VF Pavlidis 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS), 77-80, 2014	14	2014
Designing low-power energy recovery adders based on pass transistor logic D Soudris, V Pavlidis, A Thanailakis ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and …, 2001	14	2001

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